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N-channel JFET with voltage divider bias is shown in the figure. In order to keep gate source voltage in reverse bias, the voltage at source is kept more positive compared to the voltage at gate terminal of JFET. The source voltage is, V S = I D R S .  The gate voltage is set by resistors R1 and R2. DC Analysis:  For DC analysis, coupling capacitors C 1 and C 2 , and source resistor bypass capacitor C S are replaced by open circuits. The equivalent circuit diagram is shown in below figure. Step 1:  To Find V G  Expression:           Step 2:  To Find V GS  Expression: Applying KVL to the input circuit,                          V G - V GS - I D R S = 0               ∴       V GS  =  V G  - I D R S  ------------- (1) Step 3:  To Find I DQ   Expression:   By Shockl...

The circuit diagram of the self-bias configuration for N-channel JFET and P-channel JFET is shown in the figure. To operate a JFET, the gate-source junction should always be connected in a reverse-bias condition. To get this connection, negative V GS is required for N-channel JFET, and positive V GS is required for P-channel JFET. This can be achieved using the self-bias configuration shown in the diagram below. DC Analysis: Here we are considering an N-channel Self-Biased JFET configuration. For D.C analysis, coupling capacitors are replaced by open circuits, and also R G is replaced by short circuit. The equivalent circuit diagram is shown in below figure. Step 1:     To Find V GS Expression: The voltage drop across register R S is given as :                         V S = I D R S Now, the gate source voltage can be given as                  ...

It is also called Gate bias. The circuit diagram of the FET fixed bias configuration is shown in the figure. The configuration includes A.C. levels V i and V o and the coupling capacitors. The resistor ensures that V i appears at the input to the FET amplifier for AC Analysis. DC Analysis: Capacitors are considered an open circuit. Also, I G = 0 A  &  V RG = I G R G = 0 V.  The zero-voltage drop across R G permits replacing R G with a short circuit. S tep 1:     To Find V GS  Expression: Applying KVL to the input circuit,                 V GG + V GS = 0          ∴     V GS = - V GG                    ---------(1) The above equations show a fixed value of VGS. Step 2:     To Find I DQ   Expression:   By Shockley's Equation:            ∴  Step...

The Junction Field Effect Transistor can be classified as given below : N-Channel JFET P-Channel JFET The construction and operation of the N-channel and P-channel JFET are the same with minor changes. Here we are going to study in detail about N-channel JFET. N-Channel JFET : Construction : The N-channel JFET consists of an N-type bar of small extrinsic semiconductor material like silicon. At the two ends of the N-type bar, the two ohmic contacts are made. From these ohmic contacts, the two terminals:  Drain  (D) and  Source  (S) are taken out.  The basic construction and symbol of the N-channel JFET is shown below: The N-channel JFET consists of three terminals as described below; Drain (D) : The drain is connected to the positive terminal of the battery. The majority charge carriers (electrons) leave the N-type bar through this terminal. Source (S) : The source is connected to the negative terminal of the battery. The majority carriers (electr...